Carrying 100 Gb/s signals on pcb microstrip lines is an open issue.
Bundling 10 times 10Gb/s parallel lines might be a solution. Its drawbacks are required pcb space as well as crosstalk between the lanes.
You have already made some tests and measurements on such designs or developed simulation models (for Polar, HP ADS etc.) for either solution ?
Feel free to share your experiences or even share your models for broad evaluation.

