100 Gbps single lane electrical design / simulation models

News about speed increments (including allowed media, allowed distances etc.)

100 Gbps single lane electrical design / simulation models

Postby knoll » Fri May 19, 2006 1:34 pm

Carrying 100 Gb/s signals on pcb microstrip lines is an open issue.
Bundling 10 times 10Gb/s parallel lines might be a solution. Its drawbacks are required pcb space as well as crosstalk between the lanes.

You have already made some tests and measurements on such designs or developed simulation models (for Polar, HP ADS etc.) for either solution ?

Feel free to share your experiences or even share your models for broad evaluation.
knoll
NGE rank 100
NGE rank 100
 
Posts: 107
Joined: Tue Apr 11, 2006 11:43 pm
Location: Germany

Return to Trends in Line Speed and Media

Who is online

Users browsing this forum: No registered users and 0 guests

cron